An Ultra-Low Power Robust Koggestone Adder at Sub-Threshold Voltages for Implantable Bio-Medical DevicesFull Text
Sruthi Nanduru, Santosh Koppa and Eugene John, University of Texas at San Antonio, USA

VLSI Architecture for Nano Wire Based Advanced Encryption Standard (AES) with the Efficient Multiplicative Inverse
UnitFull Text
K.Sandyarani¹ and P. Nirmal Kumar², ¹Sathyabama University, India and ²Anna University, India

Zigbee Transmitter for IoT Wireless DevicesFull Text
A.Mounica and G.V.Subbareddy, GRIET-Hyderabad, India

Design of Quaternary Logical Circuit Using Voltage and Current Mode LogicFull Text
Shweta Hajare and Pravin Dakhole, Yeshwantrao Chavan College of Engineering, India

Simulation of FIR Filter Based on Cordic AlgorithmFull Text
Shalini Rai and Rajeev Srivastava, University of Allahabad, India

Built in Self Test Architecture Using Logic ModuleFull Text
Sakshi Shrivastava, Sunil Malviya and Neelesh Gupta, Truba College of Science and Technology, India

Towards Temperature Insensitive Nanoscale CMOS Circuits with Adaptively Regulated Voltage Power SuppliesFull Text
Ming Zhu¹, Yingtao Jiang¹, Mei Yang¹ and Xiaohang Wang², ¹University of Nevada Las Vegas, USA and ²South China
University of Technology, China

Design of Low Power Medical DeviceFull Text
Wei Cai and Frank Shi, University of California, USA

A Prediction Method of Gesture Trajectory Based on Least Squares Fitting ModelFull Text
Cai Mengmeng^1,2, Feng Zhiquan^1,2 and Luan Min^1,2, ¹University of Jinan, China and ²Shandong Provincial Key Laboratory of
Network-based Intelligent Computing, China

Design of Low Power SAR ADC for ECG Using 45nm CMOS TechnologyFull Text
Silpa Kesav¹, K.S.Nayanathara¹ and B.K. Madhavi², ¹CVR College of Engineering, India and ²Sridevi Women�s Engineering
College, India