Call for Papers

Special Issue on : "3-D Network-on-Chip Architectures and Design Methodologies"

Guest Editor :

Theme and Scope

Network-on-Chip ( NoC ) is a communication paradigm for large VLSI systems implemented on a single silicon chip. This uses as a new approach to design complex System-on-a-chip ( SoCs ). The NoC-based systems can accommodate multiple complex (heterogeneous) SoC designs. In any NoC system, cores such as processor, memories, and specialized IP blocks exchange data using a protocol and physical infrastructure of on-chip networks. The conventional two-dimensional ( 2-D ) integrated circuit (IC) has limited scope for floor planning and therefore limits the performance improvements resulting from the Network-on-Chip ( NoC ) paradigm. Three Dimensional (3-D) ICs are able to obtain significant performance benefits over 2-D ICs based on the electrical and mechanical properties resulting from the new geometrical arrangement (topology). The arrangement of 3-D also offers opportunities for new circuit architecture based on the geometric capacity that provide greater numbers of interconnections among multi-layer active circuits. The emerging 3-D VLSI Integration and process technologies allow the new design opportunities in 3-D NoC. The 3-D NoC can reduce significant amount of wire length for local and global interconnects.

Subject Coverage